\doxysubsubsubsection{RCC Extended MCOx Clock Config }
\hypertarget{group___r_c_c_ex___m_c_ox___clock___config}{}\label{group___r_c_c_ex___m_c_ox___clock___config}\index{RCC Extended MCOx Clock Config@{RCC Extended MCOx Clock Config}}
\doxysubsubsubsubsubsection*{Macros}
\begin{DoxyCompactItemize}
\item 
\#define \mbox{\hyperlink{group___r_c_c_ex___m_c_ox___clock___config_ga7e5f7f1efc92794b6f0e96068240b45e}{\+\_\+\+\_\+\+HAL\+\_\+\+RCC\+\_\+\+MCO1\+\_\+\+CONFIG}}(\+\_\+\+\_\+\+MCOCLKSOURCE\+\_\+\+\_\+,  \+\_\+\+\_\+\+MCODIV\+\_\+\+\_\+)
\begin{DoxyCompactList}\small\item\em Macro to configure the MCO1 clock. \end{DoxyCompactList}\item 
\#define \mbox{\hyperlink{group___r_c_c_ex___m_c_ox___clock___config_gabb7360422910dd65312786fc49722d25}{\+\_\+\+\_\+\+HAL\+\_\+\+RCC\+\_\+\+MCO2\+\_\+\+CONFIG}}(\+\_\+\+\_\+\+MCOCLKSOURCE\+\_\+\+\_\+,  \+\_\+\+\_\+\+MCODIV\+\_\+\+\_\+)
\begin{DoxyCompactList}\small\item\em Macro to configure the MCO2 clock. \end{DoxyCompactList}\end{DoxyCompactItemize}


\doxysubsubsubsubsection{Detailed Description}


\label{doc-define-members}
\Hypertarget{group___r_c_c_ex___m_c_ox___clock___config_doc-define-members}
\doxysubsubsubsubsection{Macro Definition Documentation}
\Hypertarget{group___r_c_c_ex___m_c_ox___clock___config_ga7e5f7f1efc92794b6f0e96068240b45e}\index{RCC Extended MCOx Clock Config@{RCC Extended MCOx Clock Config}!\_\_HAL\_RCC\_MCO1\_CONFIG@{\_\_HAL\_RCC\_MCO1\_CONFIG}}
\index{\_\_HAL\_RCC\_MCO1\_CONFIG@{\_\_HAL\_RCC\_MCO1\_CONFIG}!RCC Extended MCOx Clock Config@{RCC Extended MCOx Clock Config}}
\doxysubsubsubsubsubsection{\texorpdfstring{\_\_HAL\_RCC\_MCO1\_CONFIG}{\_\_HAL\_RCC\_MCO1\_CONFIG}}
{\footnotesize\ttfamily \label{group___r_c_c_ex___m_c_ox___clock___config_ga7e5f7f1efc92794b6f0e96068240b45e} 
\#define \+\_\+\+\_\+\+HAL\+\_\+\+RCC\+\_\+\+MCO1\+\_\+\+CONFIG(\begin{DoxyParamCaption}\item[{}]{\+\_\+\+\_\+\+MCOCLKSOURCE\+\_\+\+\_\+}{, }\item[{}]{\+\_\+\+\_\+\+MCODIV\+\_\+\+\_\+}{}\end{DoxyParamCaption})}

{\bfseries Value\+:}
\begin{DoxyCode}{0}
\DoxyCodeLine{\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ MODIFY\_REG(RCC-\/>CFGR,\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga26eb4a66eeff0ba17e9d2a06cf937ca4}{RCC\_CFGR\_MCO1}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga23171ca70972a106109a6e0804385ec5}{RCC\_CFGR\_MCO1PRE}}),\ ((\_\_MCOCLKSOURCE\_\_)\ |\ (\_\_MCODIV\_\_)))}

\end{DoxyCode}


Macro to configure the MCO1 clock. 


\begin{DoxyParams}{Parameters}
{\em \+\_\+\+\_\+\+MCOCLKSOURCE\+\_\+\+\_\+} & specifies the MCO clock source. This parameter can be one of the following values\+: \begin{DoxyItemize}
\item RCC\+\_\+\+MCO1\+SOURCE\+\_\+\+HSI\+: HSI clock selected as MCO1 source \item RCC\+\_\+\+MCO1\+SOURCE\+\_\+\+LSE\+: LSE clock selected as MCO1 source \item RCC\+\_\+\+MCO1\+SOURCE\+\_\+\+HSE\+: HSE clock selected as MCO1 source \item RCC\+\_\+\+MCO1\+SOURCE\+\_\+\+PLL1\+QCLK\+: PLL1Q clock selected as MCO1 source \item RCC\+\_\+\+MCO1\+SOURCE\+\_\+\+HSI48\+: HSI48 (48MHZ) selected as MCO1 source \end{DoxyItemize}
\\
\hline
{\em \+\_\+\+\_\+\+MCODIV\+\_\+\+\_\+} & specifies the MCO clock prescaler. This parameter can be one of the following values\+: \begin{DoxyItemize}
\item RCC\+\_\+\+MCODIV\+\_\+1 up to RCC\+\_\+\+MCODIV\+\_\+15 \+: divider applied to MCO1 clock \end{DoxyItemize}
\\
\hline
\end{DoxyParams}
\Hypertarget{group___r_c_c_ex___m_c_ox___clock___config_gabb7360422910dd65312786fc49722d25}\index{RCC Extended MCOx Clock Config@{RCC Extended MCOx Clock Config}!\_\_HAL\_RCC\_MCO2\_CONFIG@{\_\_HAL\_RCC\_MCO2\_CONFIG}}
\index{\_\_HAL\_RCC\_MCO2\_CONFIG@{\_\_HAL\_RCC\_MCO2\_CONFIG}!RCC Extended MCOx Clock Config@{RCC Extended MCOx Clock Config}}
\doxysubsubsubsubsubsection{\texorpdfstring{\_\_HAL\_RCC\_MCO2\_CONFIG}{\_\_HAL\_RCC\_MCO2\_CONFIG}}
{\footnotesize\ttfamily \label{group___r_c_c_ex___m_c_ox___clock___config_gabb7360422910dd65312786fc49722d25} 
\#define \+\_\+\+\_\+\+HAL\+\_\+\+RCC\+\_\+\+MCO2\+\_\+\+CONFIG(\begin{DoxyParamCaption}\item[{}]{\+\_\+\+\_\+\+MCOCLKSOURCE\+\_\+\+\_\+}{, }\item[{}]{\+\_\+\+\_\+\+MCODIV\+\_\+\+\_\+}{}\end{DoxyParamCaption})}

{\bfseries Value\+:}
\begin{DoxyCode}{0}
\DoxyCodeLine{\ \ \ \ MODIFY\_REG(RCC-\/>CFGR,\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga022248a1167714f4d847b89243dc5244}{RCC\_CFGR\_MCO2}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gae387252f29b6f98cc1fffc4fa0719b6e}{RCC\_CFGR\_MCO2PRE}}),\ ((\_\_MCOCLKSOURCE\_\_)\ |\ ((\_\_MCODIV\_\_)\ <<\ 7)));}

\end{DoxyCode}


Macro to configure the MCO2 clock. 


\begin{DoxyParams}{Parameters}
{\em \+\_\+\+\_\+\+MCOCLKSOURCE\+\_\+\+\_\+} & specifies the MCO clock source. This parameter can be one of the following values\+: \begin{DoxyItemize}
\item RCC\+\_\+\+MCO2\+SOURCE\+\_\+\+SYSCLK\+: System clock (SYSCLK) selected as MCO2 source \item RCC\+\_\+\+MCO2\+SOURCE\+\_\+\+PLL2\+PCLK\+: PLL2P clock selected as MCO2 source \item RCC\+\_\+\+MCO2\+SOURCE\+\_\+\+HSE\+: HSE clock selected as MCO2 source \item RCC\+\_\+\+MCO2\+SOURCE\+\_\+\+PLLCLK\+: PLL1P clock selected as MCO2 source \item RCC\+\_\+\+MCO2\+SOURCE\+\_\+\+CSICLK\+: CSI clock selected as MCO2 source \item RCC\+\_\+\+MCO2\+SOURCE\+\_\+\+LSICLK\+: LSI clock selected as MCO2 source \end{DoxyItemize}
\\
\hline
{\em \+\_\+\+\_\+\+MCODIV\+\_\+\+\_\+} & specifies the MCO clock prescaler. This parameter can be one of the following values\+: \begin{DoxyItemize}
\item RCC\+\_\+\+MCODIV\+\_\+1 up to RCC\+\_\+\+MCODIV\+\_\+15 \+: divider applied to MCO2 clock \end{DoxyItemize}
\\
\hline
\end{DoxyParams}
